TSMC eyes Japan for advanced chip packaging expansion

Taiwan’s TSMC is weighing establishing advanced packaging capacity in Japan, a move that would bolster Japan’s attempts to revive its semiconductor sector.

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According to Reuters, Taiwan Semiconductor Manufacturing Company (TSMC), the largest chip semiconductor company in the world, is looking at building an advanced chip packaging capacity in Japan. According to the report, the discussions are still in the preliminary stages, with the chipmaking giant still considering several options, one of which is setting up a production line in Japan for its ‘Chip on Wafer on Substrate’ (CoWoS) packaging technology.

Why does it matter?

CoWoS is a high-precision technique that stacks chips on top of each other to augment processing power, save space, and lower power usage. All of TSMC’s CoWoS capabilities are now in Taiwan.
Introducing TSMC’s CoWoS packaging technology to Japan would boost available processing power and potentially double CoWoS output this year.

Fueled by the AI boom, demand for advanced semiconductor packaging has risen globally, pushing giant chipmakers like TSMC, Samsung, Micron, and Intel to ramp up their production.
Japan is seen as a leading candidate to play a greater role in advanced packaging thanks to its major semiconductor materials and equipment providers, increasing investment in chip manufacturing capacity, and strong customer base. So far, the government has supported TSMC’s projects in Japan with hefty subsidies. Having lost ground to Taiwan and South Korea, Tokyo sees semiconductors as critical to its economic security.