Siemens and NVIDIA bring self-verifying AI agents to chip design
Faster verification, lower token costs and improved design quality are promised through new self-verifying AI agents.
Siemens and NVIDIA have expanded their partnership to develop AI-agent workflows that validate their outputs against established electronic design automation tools used in semiconductor and printed circuit board design.
The capabilities are built on Siemens’ Fuse EDA AI Agent system, which plans and coordinates tasks across multiple engineering tools. Siemens said the expanded functions would become available in forthcoming releases of its AI-native EDA portfolio, but did not provide a release date.
Rather than relying solely on AI model conclusions, the agents are designed to test their decisions against deterministic, physics-based EDA engines. The approach is intended to identify incorrect outputs before they enter later stages of chip development.
Fuse is also integrated with Siemens’ Intelligence Center X, allowing companies to create and coordinate agents within a broader industrial AI environment covering design, manufacturing and supply-chain operations.
The system combines NVIDIA’s NeMo Gym optimisation tools, Nemotron models, and Switchyard reasoning software with CUDA-X accelerated computing. NVIDIA’s OpenShell runtime is intended to provide access controls, audit trails and governed environments for agents working with commercially sensitive design data.
The agents can coordinate tasks across synthesis, verification, physical implementation, custom integrated circuit design, advanced packaging and printed circuit board development. Supported Siemens tools include Catapult, Questa One, Veloce, Solido, Aprisa, Calibre, Tessent, Innovator3D IC and Xpedition.
Siemens said agentic workflows within its Solido Characterization Suite reduced library-characterisation turnaround times by more than tenfold and token costs by between five and ten times. The company did not publish the methodology, comparison workload or independent validation supporting those figures.
A new Solido Layout Analyzer also allows engineers to examine layout-dependent effects, request recommendations and generate reports through natural-language prompts. STMicroelectronics, the only prospective customer named in the announcement, said it planned to test and validate the tool during ongoing design work.
Siemens is also extending NVIDIA’s Nemotron 3 Ultra model into its digital-verification tools. The company estimates that verification can account for up to 70% of chip-design time and argues that agents linked to established verification systems could identify problems earlier in increasingly complex chips, chiplets and 3D integrated circuits.
Why does it matter?
Errors in semiconductor design can become extremely costly if discovered only after manufacturing begins. Connecting AI agents to deterministic verification tools and audit systems could make automation more suitable for high-stakes engineering than agents that rely only on probabilistic model outputs. However, the capabilities are not yet generally available, and Siemens’ performance and reliability claims still require independent testing in production environments.
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